发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To simplify the manufacturing process of CMOS devices of the offset gate structure by a method wherein each of the side walls are independently formed on the sides of the gate electrodes of a P-MOS transistor and then of an N-MOS transistor. CONSTITUTION:A P well 2 and polycrystalline silicon gate electrode 5 are formed on an N type silicon semiconductor substrate 1. With a silicon nitride film 31 acting as a mask, a low-concentration boron-diffused layer 33 is formed. A process follows wherein side walls 34a composed of SiO2 are formed on the sides of the gate electrode 5 and a high-concentration boron-diffused layer 36 is formed with the side walls 34a serving as a mask, for the formation of source/ drain regions 37a, 37b for a P-MOS transistor constituted of the diffused layers 33, 36. A silicon nitride film 38 serves as a mask in a process for the formation of a low-density phosphur-diffused layer 41. Side walls 42a are formed on the sides of the gate electrode 5 and the side walls 42a serve as a mask in a process for the formation of a high-concentration arsenic-diffused layer 44 for the completion of source/drain regions 45a, 45b for an N-MOS transistor constituted of the diffused layers 41, 44.
申请公布号 JPS615571(A) 申请公布日期 1986.01.11
申请号 JP19840125181 申请日期 1984.06.20
申请人 HITACHI SEISAKUSHO KK 发明人 OGISHIMA JIYUNJI
分类号 H01L27/092;H01L21/8234;H01L21/8238;H01L27/088;H01L29/78 主分类号 H01L27/092
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