发明名称 IMAGE PROCESSOR
摘要 <p>PURPOSE:To displace an image in parallel at a high speed with the simple constitution by permitting a control circuit to transfer image data of one line to the 1st SAM from the 1st frame memory, applying an off-set of DELTAX to the 2nd SAM from the 1st SAM so as to transfer it and applying an off-set of DELTAY to the 2nd frame memory from the 2nd SAM so as to transfer it. CONSTITUTION:Under the control of a CPU 5, an address signal is outputted to an MPX 6 from an Y address counter 2 through an attenuator 4, and the MPX 6 specifies sequentially Y addresses in the 1st frame memory (FM) 8. Whenever it specifies the address, data of one line is transferred to the 1st SAM 9 from an FM 8. An off-set amount DELTAx is transferred to the SAM 9 from a DX register 14 through an attenuator 3 and an MX 6, and the data is off-set by DELTAx and transmitted to the 2nd SAM 11. Then an off-set amount of DELTAY from a DY register 15 is added to the address from the counter 2 by means of the attenuator 4, and the data is off-set. The image data subjected to the parallel displacement by DELTAX and DELTAY is transferred to the 2nd frame memory 10 from the 2nd SAM 11.</p>
申请公布号 JPS61251967(A) 申请公布日期 1986.11.08
申请号 JP19850093488 申请日期 1985.04.30
申请人 FANUC LTD 发明人 KURAKAKE MITSUO;OTSUKA SHOICHI
分类号 H04N19/00;G06T1/60;G06T3/00;G06T3/20;G09G1/06;G09G5/20;G09G5/38;G09G5/39 主分类号 H04N19/00
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