发明名称 INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To furnish a semiconductor device having a number of input/output connection bumps and short circuit prevention bumps by a construction wherein a plurality of connection bumps formed in the respective peripheral portions of four sides of an LSI chip and composed of first and second rows are disposed zigzag at positions whereat they do not overlap each other in the direction of the row. CONSTITUTION:Gold-plated connection bumps 2 and short circuit prevention bumps 3 are formed in the respective peripheral portions of four sides on the surface of an LSI chip 1. The connection bumps 2 must be in a plurality and composed of first and second rows in the peripheral portion of each side, and the rows are formed in zigzag disposition at positions whereat they do not overlap each other in the direction of the row. On the other hand, an LSI chip accommodating portion 8 of an insulating film 7 is perforated beforehand, and a copper leaf is made to stick closely on the insulating film 7 so as to form a plurality of input/output terminals 4, wiring patterns 5 and testing electrodes 6 in a zigzag form in a prescribed manner. A plurality of connection bumps 2 and a plurality of input/output terminals 4 mentioned above, which are formed in disposition of two rows, are matched in position with each other in the ratio of 4 to 1 and connected together.
申请公布号 JPS62188333(A) 申请公布日期 1987.08.17
申请号 JP19860031162 申请日期 1986.02.14
申请人 NEC CORP 发明人 IWATA YUJI
分类号 H01L21/60 主分类号 H01L21/60
代理机构 代理人
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