发明名称 Dual sigma-delta analog-to-digital converter
摘要 A sigma-delta (ΣΔ) analog-to-digital converter (ADC) comprises a main ΣΔ modulator configured to receive an analog input signal at a main ΣΔ modulator input and to provide a main digital output signal representative of the analog input signal and an auxiliary ΣΔ modulator configured to receive an auxiliary input signal at an auxiliary ΣΔ modulator input and to provide an auxiliary digital output signal, wherein the ΣΔ ADC comprises a shared integrator stage, the shared integrator stage is configured to be used by the main ΣΔ modulator and the auxiliary ΣΔ modulator, wherein, alternatingly, the shared integrator stage is selectively communicatively coupled to receive the analog input signal when configured to be used by the main ΣΔ modulator and selectively communicatively coupled to receive the auxiliary input signal when configured to be used by the auxiliary ΣΔ modulator.
申请公布号 US9509332(B1) 申请公布日期 2016.11.29
申请号 US201514934442 申请日期 2015.11.06
申请人 Freescale Semiconductor, Inc. 发明人 Garrity Douglas A.;Hoseini Mariam;Stachew Mark J.
分类号 H03M3/00 主分类号 H03M3/00
代理机构 代理人
主权项 1. A sigma-delta (ΣΔ) analog-to-digital converter (ADC) comprising: a main ΣΔ modulator configured to receive an analog input signal at a main ΣΔ modulator input and to provide a main digital output signal representative of the analog input signal; an auxiliary ΣΔ modulator configured to receive an auxiliary input signal at an auxiliary ΣΔ modulator input and to provide an auxiliary digital output signal, wherein the ΣΔ ADC comprises a shared integrator stage, the shared integrator stage is configurable to be used by the main ΣΔ modulator and the auxiliary ΣΔ modulator, wherein, alternatingly, the shared integrator stage is selectively communicatively coupled to receive the analog input signal when configured to be used by the main ΣΔ modulator and selectively communicatively coupled to receive the auxiliary input signal when configured to be used by the auxiliary ΣΔ modulator; and a status checking circuit coupled to the auxiliary ΣΔ modulator to receive the auxiliary digital output signal and to provide a status indication that indicates a functional status relating to the main ΣΔ modulator.
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