发明名称 LSI LAY OUT PROCESS
摘要 PURPOSE:To digitize the coupling degree of blocks enabling them to be arranged by computation for automation by a method wherein the blocks are replaced with dynamic model using the size of blocks, the number wirings between blocks and allowable delay in wiring as parameters. CONSTITUTION:Respective functional blocks 5-8 represented by circles corresponding to respective capacities are provided with repulsion corresponding to the circles. The wirings between respective blocks are substituted for springs connecting the blocks while the length of wirings is equivalent to the sum of radiuses of blocks connected while the spring constant is to be the sum of products of connection numbers and weight of allowable delay. Assuming the distance between blocks as x, the force F1=-kx is given to respective blocks 5-8 in this model while the repulsion between blocks is equivalent to F2=l/r<2> (l represents coefficient of repulsion). Respective blocks are shifted in the direction of forces given until said forces are balanced. Through these procedures, respective blocks can be replaced with the actual functional blocks by specified arrangement to finish the arrangement of respective blocks 1-4.
申请公布号 JPS63153851(A) 申请公布日期 1988.06.27
申请号 JP19860300831 申请日期 1986.12.17
申请人 NEC CORP 发明人 ABE MICHIO
分类号 H01L21/822;G06F17/50;H01L27/02;H01L27/04 主分类号 H01L21/822
代理机构 代理人
主权项
地址