发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To make the soft error resistance high by inserting resistors and transistors connected in parallel between the drain and the gate where the flip flops included in a memory cell are cross-connected, and simultaneously connecting the respective gates of the transistors to a word line. CONSTITUTION:In the store state, a word line W is set to a 'L'-level and transistors Q7, Q8 are in an OFF state, so common node points a, c are equivalently connected by a resistor R1, and common node points b, d are equivalently connected by a resistor R2. In the read state, the word line W is set to a 'H'- level, so the transistors Q7, Q8 come into an ON state. For this, the respective resistance values between the common node points a, c and between the common node points b, d remarkably decrease. In the write state, since the word line W is set to the 'H'-level, the resistances of the transistors Q7, Q8 have remarkably decreased. With this, a device having a high soft error resistance but having a fast transient response at the writing time can be obtained.
申请公布号 JPS63166260(A) 申请公布日期 1988.07.09
申请号 JP19860314113 申请日期 1986.12.27
申请人 MITSUBISHI ELECTRIC CORP 发明人 WATABE KIYOTO
分类号 H01L27/11;G11C11/41;H01L21/8244;H01L27/10 主分类号 H01L27/11
代理机构 代理人
主权项
地址