| 摘要 |
A distortion reduction circuit for a digital to analog converter, comprising a bit detection circuit for detecting the logic value of any bit from input data thereto, a synchronizing circuit for synchronizing the output from the bit detection circuit with the analog output from the converter, and an adding and subtracting circuit for converting the value of an output voltage from the synchronizing circuit to a direct current voltage having any level. The output from the adding and subtracting circuit is arranged to be added to the analog output from the digital to analog converter.
|
