Multiprocessor systems with cross-interrogated store-in-caches.
摘要
<p>An improved multiprocessor system of the type including a plurality of processors and an array of memories interconnected by an interrogation logic where the processors have a store-in cache is presented. In such processors the most recent copy of the data does not always reside in the memories but can reside in a processor's cache necessitating cross-interrogation producing system delays. These delays are reduced by a fetch buffer selectively coupled to each memory for holding data before cross-interrogation and other checks are complete.</p>
申请公布号
EP0351955(A2)
申请公布日期
1990.01.24
申请号
EP19890306227
申请日期
1989.06.20
申请人
INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人
CURRAN, BRIAN WILLIAM;D'ONOFRIO, JOSEPH MICHAEL;FUQUA, RICHARD NICKELS;HERZL, ROBERT DOV;MILICH, LOUIS JAMES;MOORE, PAUL MILTON;TEMPLE, JOSEPH LESTER, III