| 摘要 |
PURPOSE:To protect an integrated circuit of this design against etching at the patterning of the gate electrode wiring of a semiconductor substrate by a method wherein a conductive material buried in an opening is brought into contact with a wiring under an interlaminar insulating film. CONSTITUTION:An interlaminar insulating film 10 on a source/drain region 8b, a gate electrode wiring 7 of polycrystalline, and a gate insulating film 4 are successively subjected to a selective etching to provide an opening, and a polycrystalline silicon layer 11 is deposited in the opening. The silicon layer 11 is brought into contact with the gate electrode wiring 7 at a part of its side face and electrically connected with it to enable the gate electrode wiring 7 to be electrically connected to the N-type source/drain region 8b. As mentioned above, an opening is provided to the interlaminar insulating film 10 and the gate insulating film 4, and a conductive material is buried in the opening, whereby a semiconductor integrated circuit of this design is protected against etching at the patterning of a gate electrode and consequently prevented from deteriorating in quality and reliability. |
