发明名称 |
Semiconductor memory device |
摘要 |
A ferroelectric capacitor and another ferroelectric capacitor or dielectric capacitor have one of their electrodes commonly connected to an address selection switching element with its gate connected to a word line and the other of their electrodes connected to first and second plate voltage supply line, respectively. Two operation modes are provided. A first operation mode has a first voltage supplied to a first plate voltage supply line and a second voltage to a second plate voltage supply line. A second operation mode has the second voltage supplied to the first plate voltage supply line and the first voltage to the second plate voltage supply line.
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申请公布号 |
US5383150(A) |
申请公布日期 |
1995.01.17 |
申请号 |
US19940183958 |
申请日期 |
1994.01.19 |
申请人 |
HITACHI, LTD. |
发明人 |
NAKAMURA, MASAYUKI;OSHIMA, KAZUYOSHI |
分类号 |
G11C14/00;G11C11/22;H01L21/822;H01L21/8242;H01L21/8246;H01L27/04;H01L27/10;H01L27/105;H01L27/108;(IPC1-7):G11C13/00 |
主分类号 |
G11C14/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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