发明名称 Circuit arrangement.
摘要 <p>The invention relates to a circuit arrangement for operating a load (La) from a supply voltage, provided with input terminals (K1, K2) for connection to poles of a supply voltage source, a circuit portion V for limiting an input current which flows through the input terminals owing to the supply voltage during operation, comprising a first field effect transistor S1 provided with two main electrodes and a gate electrode and coupled to an input terminal such that the input current flows through both main electrodes (K3, K4) of the field effect transistor S1 during operation. According to the invention, the first field effect transistor S1 is of the depletion FET type and is coupled to the input terminals of the circuit arrangement exclusively via the main electrodes. It is achieved thereby that the input current is limited by comparatively simple means. &lt;IMAGE&gt; &lt;IMAGE&gt;</p>
申请公布号 EP0648003(A1) 申请公布日期 1995.04.12
申请号 EP19940202870 申请日期 1994.10.04
申请人 PHILIPS ELECTRONICS N.V. 发明人 OVERGOOR, BERNARDUS JOSEPHUS MAIRA
分类号 H05B41/24;H02H9/02;(IPC1-7):H02H9/02 主分类号 H05B41/24
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