High-density programmable logic device in a multi-chip module package with improved interconnect scheme

摘要

A high performance single package multi-chip module multiplies the logic density of the highest density monolithic programmable logic device (PLD). A dual-sided substrate carries multiple prepackaged PLDs on a top side and a field programmable interconnect (FPIC) die on a bottom side. The input/output terminals of the PLDs are interconnected with the FPIC die in a scrambled fashion to reduce signal skew.