| 摘要 |
PROBLEM TO BE SOLVED: To provide a pseudo error addition circuit which adds a pseudo error to PSK modulation symbol data. SOLUTION: A value based on a specified bit error rate is loaded, a clock signal is counted by a counter 11, an output from a PN data generator 21 is accumulated in a shift register 22 by a carrier of the counter 11, and an output of a PN comparison circuit 3 at the time of coincidence between the accumulated data coincide and a counted value of the counter 11 is defined as an error pulse. The error pulse is received, a bit to which an error is added in the PSK modulation symbol data is selected with an interval based on the bit error rate at random by a bit selector on the basis of the output of the PN data generator, the selected bit in the PSK modulation symbol data after interleave is reversed by a bit reversal circuit 5 and outputted and, by doing these, the error is added.
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