发明名称 |
A multiport storage array |
摘要 |
<p>A storage array is described which is specifically adapted to support a specific set of instruction modes of a processor. A first set of storage cells have a write input and a single read output. Second and third sets of storage cells each have a write input and only two read outputs. A fourth set of storage cells each have a write input and only three outputs. All the write inputs are addressable in common by a single write address and the read outputs are individually selectable responsive to a read pointer. <IMAGE> <IMAGE> <IMAGE></p> |
申请公布号 |
EP1050885(A1) |
申请公布日期 |
2000.11.08 |
申请号 |
EP19990410050 |
申请日期 |
1999.05.03 |
申请人 |
STMICROELECTRONICS S.A. |
发明人 |
WOJCIESZAK, LAURENT;FERRANTE, SONIA |
分类号 |
G06F9/38;G11C8/16;(IPC1-7):G11C8/00 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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