发明名称 |
Disposable spacer technology for reduced cost CMOS processing |
摘要 |
A method of fabricating a CMOS transistor using a silicon germanium disposable spacer (114) for the source/drain implant. After gate etch, silicon germanium disposable spacers (114) are formed. A NMOS resist pattern (116) is formed exposing the NMOS regions (120) and the n-type source/drain implant is performed. The disposable spacers (114) in the NMOS regions are removed and, with the NMOS resist mask (116) still in place, the LDD/MDD implant is performed. The process may then be repeated for the PMOS regions (122).
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申请公布号 |
US6699763(B2) |
申请公布日期 |
2004.03.02 |
申请号 |
US20030389017 |
申请日期 |
2003.03.13 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
GRIDER DOUGLAS T.;BREEDIJK TERENCE |
分类号 |
H01L21/8238;(IPC1-7):H01L21/336;H01L21/302;H01L21/311;H01L21/461 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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