发明名称 |
FILLING CAVITIES IN AN INTEGRATED CIRCUIT AND RESULTING DEVICES |
摘要 |
A methodology enabling filling of high aspect ratio cavities, with no voids or gaps, in an IC device and the resulting device are disclosed. Embodiments include providing active area and/or gate contacts in a first ILD; forming selective protective caps on upper surfaces of the contacts; forming a second ILD on upper surfaces of the protective caps and on an upper surface of the first ILD; forming a hard-mask stack on the second ILD; forming, in the second ILD and hard-mask stack, cavities exposing one or more protective caps; removing selective layers in the stack to decrease depths of the cavities; and filling the cavities with a metal layer, wherein the metal layer in one or more cavities connects to an upper surface of the one or more exposed protective caps. |
申请公布号 |
US2017047248(A1) |
申请公布日期 |
2017.02.16 |
申请号 |
US201615340181 |
申请日期 |
2016.11.01 |
申请人 |
GLOBALFOUNDRIES Inc. |
发明人 |
RULLAN Jonathan Lee;SINGH Sunil Kumar |
分类号 |
H01L21/768;H01L21/027;H01L23/532;H01L23/522;H01L23/528;H01L23/535 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
1. A device comprising:
active area and/or gate contacts in a first interlayer dielectric (ILD); selective protective caps on upper surfaces of the contacts; a second ILD on upper surfaces of the protective caps and on an upper surface of the first ILD; and vias through the second ILD down to the protective caps. |
地址 |
Grand Cayman KY |