| 摘要 |
1461644 Charge-coupled devices FAIRCHILD CAMERA & INSTRUMENT CORP 24 July 1974 [28 Dec 1973] 32719/74 Heading H1K In a process for producing a CCD in which the gate electrode structure is precisely aligned with barrier regions defining the boundaries of adjacent potential wells the regions are formed by ion implantation in such a manner that the surface areas of the structure overlying the regions are different from the rest of the surface thereby enabling them to be identified in subsequent steps for forming the electrodes. In the embodiment described a layer 24 of thermal oxide (Fig. 7) and deposited layers of silicon nitride 26 and doped polysilicon 28 are successively formed on one face of a P type silicon wafer and arsenic or phosphorous ions are implanted to form an N type layer 21 in the wafer before or after deposition of the polysilicon. A further layer of silicon nitride 30 is then deposited and formed into a mask with parallel elongate apertures by photoresist and etching steps. Boron ions are next implanted through the apertures to form N-barrier regions 44, and the surface of the polysilicon in the apertures oxidized 54. The areas between alternate pairs of barrier regions are photoresist masked, the exposed nitride etched, the alternate barrier regions similarly masked and the exposed oxide regions 54 etched away, to leave areas 74, 76 (Fig. 10) of polysilicon exposed. After etching away the exposed polysilicon alternative procedures are suggested. In the first the edges of the remaining polysilicon strips constituting electrodes of one phase are oxidized and aluminium deposited overall and patterned to form a strip normal to the polysilicon strips and constituting the electrodes of the other phase. In the second procedure the residual nitride is etched away and oxide formed over the exposed polysilicon prior to deposition of the aluminium. |
