| 摘要 |
<p>PURPOSE:To improve the recording density of a PCM signal on a recording medium by carrying error detection and correction into effect after passing a bit clock signal, extracted by a clock generating circuit, through a frame counter and word counter. CONSTITUTION:Binary reproduced data which never includes a frame-synchronizing signal or word-synchronizing signal is supplied to terminal 1 and clock generating circuit 2 extracts bit clocks. This signal is passed through frame counter 8 and word counter 9 to generate three word timing pulses Sw in each frame, and after error detection correction 5 and D/A conversion 6, right and left channel signals of a stereo audio signal are led out from output terminals 7L and 7R. Consequently, the need to insert a frame-synchronizing signal into data is eliminated, so that the recording density of a PCM signal on a recording medium such as a rotary disk can be improved.</p> |
