| 摘要 |
PURPOSE:To realize the smooth shift of the effect screen without increasing the arithmetic velocity but by carrying out the selection of several delay circuits provided at the input route of the clock pulse via the lower-rank bit of the output of the A/D converter. CONSTITUTION:Both delay circuit 20 and selection circuit 21 are inserted to the route of the clock pulse from horizontal higher harmonic generating circuit 4'. Circuit 20 consists of delay line 22 of about 62ns, delay line 23 of about 124ns and delay line 24 of about 186ns each; and these lines are selected according to the state of the lower-rank bit and through circuit 21. Circuit 21 comprises four switches 25-28 plus decoder 29. Decoder 29 receives two lower-rank bits among the output of A/D converter 16 and then changes over switches 25-28. The clock pulse sent from circuit 21 is supplied to horizontal digital arithmetic circuit 2 to decide the arithmetic timing. The cycle is kept at 1/256H and shifts in the 62ns-step with interlocking of the pulses sent from circuit 21 lathough the shift of the horizontal reset pulse is set to 62ns. As a result, the special effect basic wave which shifts with the horizontal reset pulse can be obtained at the output of circuit 2. |
