| 摘要 |
PURPOSE:To reduce circuit elements in number by connecting two MOSFETs of the 1st conduction type in series between the 1st potential point and an output terminal, by further connecting MOSFET of the 2nd conduction type between the output terminal and the 2nd potential point, and by combining them with an NOR circuit. CONSTITUTION:Between the 1st potential point -Vdd and output terminal T0, N-type MOSFETQ1, Q2 are connected in series and between terminal T0 and the 2nd potential point GND, P-type MOSFETQ3 is also connected. The 1st input terminal T1 is connected to one input of NOR gate G1, the 2nd input terminal T2 is connected to the gate of FETQ1 and the other input of gate G1, and the output of gate G1 is led to the gates of FETQ2, Q3. Assuming that signal V2 at terminal T2 is held at ''0'' and signal V1 at terminal T1 is at ''1'', signal V0 at terminal T0 is held at ''1'' and assuming signals V2 and V1 to be held at ''0'' obtains signal V0 of ''0''. When signals V1 and V2 are considered to be held at ''1'' or when signals V2 and V1 are at ''1'' and ''0'' respectively, signal V0 maintains a floating level. |
