| 摘要 |
PURPOSE:To detect defective circuit elements in an output section, by taking an output of a shift register driving an output device as a time monitor signal, in a sequence controller performing transmission of information with a serial signal. CONSTITUTION:Output data are inputted to an output section from a control section via a signal line 4, and a package selection signal of a signal line 8 is inputted to an IN terminal of a shift register which makes serial-parallel conversion only at LOW of the signal. The clock signal of a signal line 5 is given to a CLK terminal of a register 12 via an AND gate 10b to obtain parallel outputs Q0-Q15, it is written in a storage circuit 13 with a latch signal of a signal line 3 and the output device is driven by amplifications 14a-14p. The output Q0 of the register 12 is taken as a trigger input to a multivibrator 15, and mistrigger due to defective signal line, defective gate and improper register operation and the like is transmitted to the control section via a signal line 7. |
