| 摘要 |
PURPOSE:To perform the diagnosis of a logical circuit with no big increment of the number of input/output pin by using the counter logic for address control to perform the test of a memory part. CONSTITUTION:In a normal working mode, only a counter 1 is used, and the state information of a computer fed to a data latch 5 is fetched successively to a memory 2 via a selector 9. A control part 4 controls the write/read action to extract successively the information out of the memory 2. While upper counters 6 and 7 for the diagnosis are actuated under the control of a diagnosis control part 13 in a diagnosis mode. Then a matching test is performed by means of an upper address. As a result, the number can be reduced for input/output pin used for the diagnosis of a memory element. |
