MID-TUNNELING DIELECTRIC BAND GAP MODIFICATION FOR ENHANCED DATA RETENTION IN A THREE-DIMENSIONAL SEMICONDUCTOR DEVICE

摘要

A tunneling dielectric layer for a vertical memory device is formed with a stack that provides a barrier height profile for high data retention tolerance. Memory stack structures extend through a stack of insulating layers and electrically conductive layers. Each memory stack structure comprises, from outside to inside, a blocking dielectric, memory elements, a tunneling dielectric layer, and a vertical semiconductor channel. The tunneling dielectric layer comprises, from outside to inside, an outer silicon oxide layer, a first silicon oxynitride layer having a first atomic nitrogen concentration, a second silicon oxynitride layer having a second atomic nitrogen concentration that is less than the first atomic nitrogen concentration, and an inner silicon oxide layer that contacts a vertical semiconductor channel. The reduced band gap of the first silicon oxynitride layer relative to the second silicon oxynitride layer provides additional energy barrier for relaxation of holes stored in the memory elements.

主权项

1. A monolithic three-dimensional memory device comprising:
a stack of alternating layers comprising insulating layers and electrically conductive layers and located over a substrate; an array of memory openings extending through the stack; and a plurality of memory stack structures located within a respective memory opening, each of the plurality of memory structures comprising memory elements, a tunneling dielectric layer, and a vertical semiconductor channel, wherein the tunneling dielectric layer comprises, from outside to inside: an outer silicon oxide layer; a first silicon oxynitride layer having a first atomic nitrogen concentration; a second silicon oxynitride layer having a second atomic nitrogen concentration that is less than the first atomic nitrogen concentration; and an inner silicon oxide layer that contacts a respective vertical semiconductor channel.