发明名称 TIMING REGENERATION CIRCUIT
摘要 PURPOSE:To keep high stability even for a high-speed signal by including a discriminator in a control loop and obtaining timing information from the correlation between reception data and the result of identification. CONSTITUTION:A reception and demodulation base band signal 1 is amplified by an amplifier 101, one of outputs 2 is given to a 1-bit delay device 102 and other one is identified at a discriminator 103 by using an identification timing signal 3. Then the correlation between an output 4 of the 1-bit delay device 102 and an output 5 of the discriminator 103 is take by the 1st correlation device 104A and the correlation between reception data 2 and the output 5 of the discriminator 103 is taken by the 2nd correlation device 104B respectively. Then an output 8 of a subtractor 105 becomes timing information, becomes an output 9 via a loop filter 106, and the identification timing signal 3 is obtained by controlling a voltage controlled oscillator 107, and when the identification timing is deviated from the midpoint of reception data, the adjustment is applied by changing the delay of the 1-bit delay device 102.
申请公布号 JPS6290052(A) 申请公布日期 1987.04.24
申请号 JP19850230226 申请日期 1985.10.15
申请人 NEC CORP 发明人 NIINA SABURO
分类号 H03L7/06;H04L7/02;H04L7/027 主分类号 H03L7/06
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