发明名称 |
Output stage with automatic level control for power line signalling. |
摘要 |
An output stage with automatic level control for power line signalling, including a controlled amplifier (F1) and a feedback circuit for sensing the output voltage (V O+v O) of the output stage and for supplying a control signal (v<4>) to a control input of the controlled amplifier (F1). The feedback circuit includes a comparator (K) for comparing an alternating voltage (v1) which is responsive to the alternating voltage component (v O) at the output of the output stage and which is furthermore superposed on a first direct voltage (V1) with a second direct voltage (V2). As control signal to the controlled amplifier (F1) there is utilised the voltage (v4) across the capacitor (C4), the voltage of which increases or decreases in response to the comparison result of the comparator (K). The amplitude of the alternating voltage component at the output of the output stage can thus be kept to a substantially constant value determined by the first and second direct voltages (V1 and V2).
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申请公布号 |
EP0267887(A1) |
申请公布日期 |
1988.05.18 |
申请号 |
EP19870850321 |
申请日期 |
1987.10.26 |
申请人 |
TELEFONAKTIEBOLAGET L M ERICSSON |
发明人 |
SODERSTROM, LEIF EVERT |
分类号 |
H03G3/20;H04B3/54;(IPC1-7):H03G3/20 |
主分类号 |
H03G3/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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