发明名称 MULTI-PROCESSOR SYSTEM
摘要 <p>PURPOSE:To reduce the overhead and to improve the processing capacity of a multi-processor system by using a register which stores the processing result of each processor as an arithmetic result writing register for an area common to those processors. CONSTITUTION:When an arithmetic execution code is put on a signal line 50 from outside via a driver 70, a control part 5 sends a command to a command signal line 20 to start processors 1-3 at a time and starts a reading action. The processors 2 and 3 write the arithmetic results into registers 12 and 13 as soon as those arithmetic operations are over and transmit an arithmetic end signal to the part 5. A processor 1 sends a register read request signal to the part 5 and designates a register block and an address via a signal line 60 after receiving the arithmetic end signals of processors 2 and 3. Then the processor 1 transmits the arithmetic results of processors 2 and 3 and at the same time gives a read permission signal to the processor 1 to fetch the data on the bus signal line 50 and to write it to a register 11.</p>
申请公布号 JPS63133257(A) 申请公布日期 1988.06.06
申请号 JP19860280502 申请日期 1986.11.25
申请人 NEC CORP 发明人 AOKI HIROMICHI
分类号 G06F15/16;G06F15/167 主分类号 G06F15/16
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