| 摘要 |
<p>PURPOSE:To perform the validity check of a second control memory within a conventional time simultaneously with the validity check of a first control memory, by providing an error detecting means which performs the error detection of the second control memory. CONSTITUTION:When an address scan mode is set, the address of the first control memory 200 is switched to the output of an address scanning means 100, and the content of an address 0 is read out at a register 210, and validity is checked by a first error detecting means 400, and when no error exists, the address scanning means 100 performs count up, and increases the output. In parallel with this, the contents of the addresses of second control memories 300 and 310 indexed by a part of the register 210 are inputted to second error detecting means 600 and 610, and the validity are checked. Also, when the first error detecting means 400 detects an error possible to be corrected, a corrected data, after being written in the first control memory 200, is checked again.</p> |
