发明名称 MEMORY ACCESS SYSTEM
摘要 PURPOSE:To improve the high-speed working performance of a processor consisting of a CPU and a memory by comparing an address obtained in a memory access with the contents of a boundary register to activate exclusively two different signal lines and at the same time outputting continuous addresses at the time of memory access. CONSTITUTION:The contents of storage are compared with each other between an address register 5 and a boundary register 4. Then the output of a comparator 6 is set at L if the address value is smaller than the boundary value. Then the output of an AND gate 7-4 and an OR gate 7-10 to which the inverted data are applied are set at H and a signal line 7-2 is active in place of a signal line 7-1. Thus a high-speed ROM storing the data having high using frequencies is selected. Then the ROM receives an access with two continuous address produced by a +1 circuit 8-1 and a selecting circuit 8-2. As a result, the access speed is increased for a processor consisting of a CPU and a memory.
申请公布号 JPS63147245(A) 申请公布日期 1988.06.20
申请号 JP19860294439 申请日期 1986.12.10
申请人 NEC CORP 发明人 HAYASHI TAKAO
分类号 G06F12/08;G06F9/38;G06F12/06 主分类号 G06F12/08
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