发明名称 Semiconductor switch circuit, signal processing apparatus, and ultrasound diagnostic apparatus
摘要 A semiconductor switch circuit comprises: a first switch pair including two MOSFETs having gates connected one another and sources connected to one another, and a zener diode reversely connected between the gates and sources of the MOSFETs; a second switch pair including two MOSFETs having gates connected one another and sources connected to one another, and a zener diode reversely connected between the gates and sources of the MOSFETs; and a third switch pair comprising two MOSFETs having gates connected to one another and sources connected to one another. The first switch pair and the second switch pair are connected in series between two input/output terminals through a connecting node. The third switch pair is connected to the connecting node between the first switch pair and the second switch pair.
申请公布号 US9531368(B2) 申请公布日期 2016.12.27
申请号 US201414461382 申请日期 2014.08.16
申请人 Hitachi Power Semiconductor Device, Ltd. 发明人 Honda Hironobu;Yamashita Fumiaki;Aizawa Junichi
分类号 H03K17/10;A61B8/00;H03K17/687;H03K17/06;H03K17/082 主分类号 H03K17/10
代理机构 Miles & Stockbridge P.C. 代理人 Miles & Stockbridge P.C.
主权项 1. A semiconductor switch circuit, comprising: a first switch pair including first two MOSFETs having gates connected to one another and sources connected to one another, anda zener diode reversely connected between the gates and sources of said first two MOSFETs; a second switch pair including second two MOSFETs having gates connected to one another and sources connected to one another, anda zener diode reversely connected between the gates and sources of said second two MOSFETs; a third switch pair comprising third two MOSFETs having gates connected to one another and sources connected to one another; and a floating gate control circuit which drives the first switch pair, the second switch pair, and the third switch pair, wherein the first switch pair and the second switch pair are connected in series between two input/output terminals through a connecting node, and wherein the third switch pair is connected to the connecting node between the first switch pair and the second switch pair, wherein the floating gate control circuit switches ON/OFF of the first switch pair, the second switch pair, and the third switch pair, based on a switch control signal inputted thereto, wherein, when the switch control signal is set to a first state, gate-source capacitances of the first switch pair and the second switch pair are charged from a low voltage power supply VDC by the floating gate control circuit, so that the first switch pair and the second switch pair are brought to an ON state to reach a low impedance between the two input/output terminals, and the third switch pair is turned off, and wherein, when the switch control signal is set to a second state, the electrical charges accumulated in the gate-source capacitances of the first switch pair and the second switch pair are discharged to ground by the floating gate control circuit, so that the first switch pair and the second switch pair are brought to an OFF state to reach a high impedance between the two input/output terminals, and the third switch pair is turned on.
地址 Hitachi-shi, Ibaraki JP
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