发明名称 Silicide gate level runners.
摘要 Integrated circuits are fabricated with thick self-aligned silicide runners (17) on the field oxide (13) by etching back the first dielectric to expose patterned polysilicon on the field oxide and then forming a silicide on the patterned polysilicon.
申请公布号 EP0423973(A2) 申请公布日期 1991.04.24
申请号 EP19900310818 申请日期 1990.10.03
申请人 AMERICAN TELEPHONE AND TELEGRAPH COMPANY 发明人 HILLENIUS, STEVEN JAMES;LEE, KUO-HUA;LU, CHIH-YUAN;SUNG, JANMYE
分类号 H01L29/78;H01L21/28;H01L21/3205;H01L21/336;H01L21/768 主分类号 H01L29/78
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