Nitride polish stop for forming SOI wafers.

摘要

A method of forming a SOI integrated circuit includes the step of: defining thin silicon mesas (200) by wet etching a device layer having the <100> orientation down to the underlying insulator layer (110) bonded to the silicon substrate (10) so that the (111) crystal planes control the lateral etching, forming a nitride bottom polish stop layer (355) in the bottom of the apertures between the mesas by a low temperature CVD process, with nitride sidewalls (205) on the (111) planes of the silicon mesas being susceptible to easy removal, subsequent filling the apertures with a temporary layer (370) of polysilicon to provide mechanical support to the edges of the device layer during the polishing operation, chem-mech polish the structure until the top of said polish step layer is reached, and finally form the gate electrode (392) between the drain (394) and source (395) regions of an IGFET.