发明名称 Balanced circuitry for reducing inductive noise of external chip interconnections
摘要 Ground noise associated with lead inductance in electronic systems containing multiple lead integrated circuits is substantially reduced by including, for each chip driver lead that carries a signal, a complementary lead which carries the the inverse of that signal. These balanced pairs are continued not only in the wire bonds and lead frame of the integrated circuit, but also through any connecting assembly such as a printed wiring board or multichip module to the associated balanced chip receivers.
申请公布号 US5329170(A) 申请公布日期 1994.07.12
申请号 US19930166342 申请日期 1993.12.13
申请人 AT&T BELL LABORATORIES 发明人 RAINAL, ATTILIO J.
分类号 H01L21/60;H01L23/50;H01L23/64;H01L25/065;H01L25/10;(IPC1-7):H01L25/00;H03B1/00 主分类号 H01L21/60
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