发明名称 System with memory having voltage applying unit
摘要 The present invention provides a system comprising a semiconductor device, a method of controlling the semiconductor device in the system, and a method of manufacturing the semiconductor device in the system. The semiconductor device includes: a semiconductor region located in a semiconductor layer formed on an isolating layer; an ONO film on the semiconductor region; bit lines on either side of the semiconductor region, which are located in the semiconductor layer, and are in contact with the isolating layer; a device isolating region on two different sides of the semiconductor region from the sides on which the bit lines are located, the device isolating region being in contact with the isolating layer; and a first voltage applying unit that is coupled to the semiconductor region. In this semiconductor device, the semiconductor region is surrounded by the bit lines and the device isolating region, and is electrically isolated from other semiconductor regions.
申请公布号 US9472564(B2) 申请公布日期 2016.10.18
申请号 US201414222399 申请日期 2014.03.21
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 Hayakawa Yukio
分类号 H01L27/115;G11C5/06;G11C16/10;H01L21/84;H01L27/12 主分类号 H01L27/115
代理机构 代理人
主权项 1. A system, the system comprising a processor; a cache; a user input component; and a memory comprising flash memory, the flash memory comprising: a semiconductor region located in a semiconductor layer formed on an isolating layer;an oxide nitride oxide (ONO) film on the semiconductor region;a plurality of bit lines on either side of the semiconductor region, the plurality of bit lines being located in the semiconductor layer, and being in contact with the isolating layer;a device isolating region on two different sides of the semiconductor region opposite from the sides on which the plurality of bit lines are located, the device isolating region being in contact with the isolating layer; anda first voltage applying unit that is coupled to the semiconductor region, wherein the semiconductor region is surrounded by the plurality of bit lines and the device isolating region, and is electrically isolated from other semiconductor regions.
地址 San Jose CA US