发明名称 Voltage generator, oscillation device and operation method
摘要 A voltage generator and an oscillation device, and an operation method thereof are disclosed. The oscillation device includes a non-volatile memory, the voltage generator and a voltage-controlled oscillation (VCO) circuit. The voltage generator uses the non-volatile resistance provided by a non-volatile memory to generate a bias voltage. The VCO circuit is coupled to the voltage generator so as to generate a corresponding oscillation frequency based on the bias voltage.
申请公布号 US9472278(B2) 申请公布日期 2016.10.18
申请号 US201414501049 申请日期 2014.09.30
申请人 Nuvoton Technology Corporation 发明人 Wang Cheng-Chih
分类号 G11C13/00;H03K3/03 主分类号 G11C13/00
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. An oscillation device, comprising: at least one non-volatile memory; a voltage generator, comprising a current source for providing a current flowing through the at least one non-volatile memory, for generating a bias voltage by using a non-volatile resistance of the at least one non-volatile memory; and a voltage-controlled oscillation (VCO) circuit, coupled to the voltage generator and configured to generate a corresponding oscillation frequency based on the bias voltage, wherein the non-volatile resistance of the at least one non-volatile memory is set independently from the current provided by the current source to adjust the bias voltage, wherein the non-volatile memory is located in the voltage generator, a first terminal and a second terminal of the non-volatile memory are respectively coupled to the current source and a low-level voltage, wherein the non-volatile memory comprises at least one resistive non-volatile memory (RNVM) cell coupled between the first terminal and the second terminal of the non-volatile memory so as to provide the non-volatile resistance, wherein the first terminal of the non-volatile memory provides the bias voltage, wherein the voltage generator further comprises: a NOT gate, having an input terminal and an output terminal, and the input terminal of the NOT gate receiving a programming signal;a switch, having a control terminal, a first terminal and a second terminal, the control terminal of the switch being coupled to the output terminal of the NOT gate, the first terminal of the switch being coupled to the first terminal of the non-volatile memory to receive the bias voltage and the second terminal of the switch being coupled to an input terminal of the VCO circuit; anda capacitor, coupled between the second terminal of the switch and a low-level voltage, wherein during a non-normal operation period, the switch is turned off while the capacitor maintains the bias voltage.
地址 Hsinchu TW