发明名称 Electrostatic breakdown protection circuit for a semiconductor integrated circuit device
摘要 A protection circuit for protecting against electrostatic discharges (ESD) applied to a bonding pad is connected to ground. The ESD is discharged to ground through the protection circuit, which includes a primary transistor for conducting the discharge current to ground and a gate voltage controlling circuit for controlling the gate voltage of the primary transistor. Operation of the protection circuits begins from a low electrostatic voltage, thereby positively enhancing the electrostatic voltage resistance. In particular, when the gate voltage controlling circuit is a secondary transistor, the source terminal of the primary transistor is connected to ground, and the drain terminal is connected to the bonding pad. The source terminal of the secondary transistor is also connected to ground. Its gate terminal and drain terminal are connected to the gate terminal of the primary transistor.
申请公布号 US5646808(A) 申请公布日期 1997.07.08
申请号 US19950511894 申请日期 1995.08.07
申请人 KAWASAKI STEEL CORPORATION 发明人 NAKAYAMA, OSAMU
分类号 H02H9/04;(IPC1-7):H02H9/04 主分类号 H02H9/04
代理机构 代理人
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