发明名称 Scaleable multicast ATM switch
摘要 A multicast switch for routing incoming cells having a multicast bit pattern and a priority value, arriving at a plurality of input ports, to one of a plurality of output ports, which includes input port controllers and routing modules. Each of the routing modules routes received cells to an associated one of a plurality of groups of output ports and provides a feedback priority value based on a priority value associated with a lowest priority cell passed to the associated group of output ports. Each of the input port controllers receives the incoming cells, buffers a head-of-line cell, transmits the head-of-line cell to each of the routing modules, stores the multicast bit pattern, compares the priority value of the buffered head-of-line cell with the feedback priority values from each of the routing modules to form a set of comparison values, updates the multicast bit pattern based on the comparison values to form an updated multicast bit pattern, and either retransmits the buffered head-of-line cell, or buffers and transmits a next cell, based on the updated multicast bit pattern.
申请公布号 US5724351(A) 申请公布日期 1998.03.03
申请号 US19950511811 申请日期 1995.08.07
申请人 CHAO, HUNG-HSIANG JONATHAN;CHOE, BYEONG-SEOG 发明人 CHAO, HUNG-HSIANG JONATHAN;CHOE, BYEONG-SEOG
分类号 H04L12/433;H04L12/56;(IPC1-7):H04L12/28 主分类号 H04L12/433
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