REED SOLOMON ERROR CORRECTING CIRCUIT AND METHOD AND DEVICE FOR EUCLIDEAN MUTUAL DIVISION

摘要

A Reed Solomon error correcting circuit comprises a syndrome generating circuit and an error correcting circuit that perform parallel operations through a two-stage pipeline process and the error correcting circuit can operate synchronously with a clock generated at a cycle which is 1/N (N is an integer of ≥1) the cycle of a receiving symbol clock. The error position polynomial or error evaluating polynomial calculating circuit of the error correcting circuit is constituted of a memory to which syndromes are inputted and a Galois field computing circuit connected to the memory and perform a high-speed processing with a small hardware area. In the Euclidean mutual division system which finds the error position polynomial by performing Galois field computation from a syndrome equation S(z)=Sk-1zk-1+Sk-2zk-2+...+SO, the number of Galois field computations can be reduced by initializing in the following way: M(z)=1 and B(z)=Sk-1zk-1+Sk-2zk-2+...SO and from the coefficients of the syndrome equation S(z), A(z)=Sk-2zk-1+Sk-3zk-2+...SOz and L(z)=z. <IMAGE>