| 摘要 |
A defect-tolerant high bandwidth memory system (20) comprises a controller (22), one or more memory modules (24) each provided with one or more memory devices (28), and a high bandwidth channel (26) for connecting the controller (22) to each module (24) and for carrying data therebetween. A non-volatile memory, which may be an EEPROM (30) or a set of registers (30b), is provided on each module for storing the locations of defective areas of the modules. The controller (22) accesses the non-volatile memory (30) and remaps physical non-defective areas of memory as a set of continuous logical areas of memory. Therefore, the controller does not generate defective physical addresses, thus allowing defect-tolerance to be implemented on high bandwidth memory systems which require transmission line matching of the memory devices. |
