发明名称 Improved dynamic access memory delay circuits and methods therefor
摘要 <p>A method for providing an activation signal configured to activate a sense amplifier of a memory circuit. The memory circuit has an array area for implementing memory cells is disclosed. The method includes receiving a first signal. The first signal is one of a Row Address Strobe (RAS) signal and a word line activation signal configured to activate a word line in the memory circuit. The method further includes delaying the first signal through a sample word line to create the activation signal, the sample word line being disposed in the array area of the DRAM circuit. Also, disclosed is a delay circuit for providing an activation signal configured to activate a sense amplifier of a memory circuit. The memory circuit has an array area for implementing memory cell. The delay circuit includes a sample word line having an input terminal and an output terminal. The sample word line is disposed in the array area of the circuit, and is configured to receive at the input terminal a first signal representing one of a Row Address Strobe (RAS) signal and a word line activation signal configured to activate a word line in the memory circuit. The sample word line is configured to output the activation signal at the output terminal.</p>
申请公布号 EP0940817(A2) 申请公布日期 1999.09.08
申请号 EP19990102135 申请日期 1999.02.03
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 HOENIGSCHMID, HEINZ;HAFFNER, HENNING
分类号 G11C11/409;G11C7/22;G11C8/18;G11C11/407;(IPC1-7):G11C8/00;G11C7/00 主分类号 G11C11/409
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