| 摘要 |
PROBLEM TO BE SOLVED: To lower the frequency of a measuring clock and to reduce the circuit scale by respectively using an angular velocity detection signal in a start control of a disk and using a linear velocity detection signal in a steady control, and switching the signal with a prescribed lock state discriminative signal. SOLUTION: A switch 28 is connected to A side at a starting time, and an acceleration/deceleration discriminative means 33 generates a spindle motor steady-driving signal 36 according to the result obtained by comparing a periodic measuring signal 32 measured by a period measuring means 31 with a target period 35 of an FG signal set in a target period generation means 34. This driving signal 36 becomes that of a motor driver 29. In the steady control of the spindle motor 7, the result obtained by measuring a phase of an interpolation synchronizing signal 24 for a reference phase signal is compared with the reference phase signal of an output of a reference phase generation circuit. A speed error component and a phase error component are mutually added/subtracted by an adder/subtracter to be made a spindle motor drive signal 39 at a steady processing time.
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