发明名称 PEAK DETECTOR
摘要 PROBLEM TO BE SOLVED: To make precisely detectable the peak of a high frequency signal. SOLUTION: This device comprises data distributing circuit 22 for distributing the digital data D outputted from an A/D converter 21 and outputting it at the rate of 1/ plural number of data output rates of the A/C converter 21; a plurality of candidate value detecting circuits 25(1)-25(N) each having a latch circuit in conformation to each signal passage and renewing the memory value of the latch circuit with the digital data every input of the digital data larger than the memory value of the latch circuit from the corresponding signal passage; a control circuit 35 for primarily storing, as candidate value, the memory value of each latch circuit after the lapse of a prescribed time from the initial set of an initial value equal to the output lower limit value of the A/D converter 21 in each latch circuit of the candidate value detecting circuits 25(1)-25(N); and a maximum value selecting circuit for selecting the maximum value of a plurality of candidates as peak value.
申请公布号 JP2001141759(A) 申请公布日期 2001.05.25
申请号 JP19990322350 申请日期 1999.11.12
申请人 ANRITSU CORP 发明人 KAMEDA KEIJI;MATSUDA TOSHIYUKI;HONDA YOSHIHIKO
分类号 G01R13/20;G01R19/04;(IPC1-7):G01R19/04 主分类号 G01R13/20
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