发明名称 |
Method, architecture and/or circuitry for controlling the pulse width in a phase and/or frequency detector |
摘要 |
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate (i) a first signal and a second signal in response to a pump down signal and (ii) a third signal and a fourth signal in response to (i) a pump up signal. The second circuit may be configured to generate (a) a first control signal in response to (i) the first signal and (ii) the third signal and (b) a second control signal in response to (i) the second signal and (ii) the fourth signal.
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申请公布号 |
US6239632(B1) |
申请公布日期 |
2001.05.29 |
申请号 |
US19990398936 |
申请日期 |
1999.09.17 |
申请人 |
CYPRESS SEMICONDUCTOR CORP. |
发明人 |
MOYAL NATHAN Y.;WILLIAMS BERTRAND J.;MARLETT MARK;MEYERS STEVE |
分类号 |
H03L7/089;(IPC1-7):H03L7/00 |
主分类号 |
H03L7/089 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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