发明名称
摘要 PURPOSE:To prevent the damage of a main circuit containing a converter due to the delay of protective operation while obviating the unnecessary stoppage of the converter by providing a first protective interlocking means by arithmetic operation and a second protective interlocking means capable of being operated at high speed by an electronic circuit and operating the first and second protective interlocking means in cooperation. CONSTITUTION:When a protective reliance signal is input to a controller 8, a first protective interlocking circuit 85 for a microcomputer control protective means 80 and a second protective interlocking circuit 101 by a separately mounted electronic circuit start their operation. Protective operation is conducted by an output signal from the second protective interlocking circuit 101 input at high speed in a phase control circuit 100, and a phase control circuit 81 stops a thyristor converter 3 when output signals from the first protective interlocking circuit 85 and the second protective interlocking circuit 101 satisfy the AND conditions of a logic circuit 100a and the pulse operation signal of the logic circuit 100a is input to the phase control circuit 81.
申请公布号 JP3244919(B2) 申请公布日期 2002.01.07
申请号 JP19940032589 申请日期 1994.03.02
申请人 发明人
分类号 H02J1/00;H02M7/12;H02M7/155 主分类号 H02J1/00
代理机构 代理人
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