| 摘要 |
PURPOSE: To obtain a semiconductor memory in which measures for software error are taken to a SRAM memory cell. CONSTITUTION: A memory cell of a SRAM is constituted by complementary connection of an inverter INV1 constituted of a NMOS transistor NM1 and a PMOS transistor PM1 and a PMOS transistor PM2 constituted of a NMOS transistor NM2 and a PMOS transistor PM2, a drain of a PMOS transistor P1 and a gate of a PMOS transistor P2 are connected to a storage node NA, and a drain of the PMOS transistor P2 and a gate of the PMOS transistor P1 are connected to a storage node NB. Thereby, capacity values of gate capacity and drain capacity of these PMOS transistors are added to the storage node NA, NB.
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