HIGH VOLTAGE TRANSISTOR OF FLASH MEMORY DEVICE TO TOLERATE HIGH VOLTAGE SNAP-BACK CONDITION

摘要

PURPOSE: A high voltage transistor of a flash memory device is provided to tolerate a high voltage snap-back condition occurring in the operation of a NAND-type flash memory device by separating a gate of a high voltage transistor from a contact of the high voltage transistor by an interval of at least 1.0 micrometer. CONSTITUTION: The interval between a contact and a gate of a source junction part(24S) and a drain junction part(24D) is at least 1.0 micrometer. Low density impurity ions are implanted to form the source junction area and the drain junction area. A high density ion implantation region(26) is formed in each contact area of the source junction area and the drain junction area.