Arrayed waveguide grating based modular interconnection networks and methods for constructing and applying the same

摘要

An arrayed waveguide grating (AWG) based interconnection network and modular construction method, comprising N1 left nodes, with each left node having N2 ports, N2 right nodes, with each right node having N1 ports, where N1≧N2, N1 and N2 having a greatest common divisor r, and each port having an optical transceiver associated with a fixed wavelength; N1n2 r×1 wavelength multiplexers having their input ports respectively connected with the ports of N1 left nodes, where n2=N2/r; N2n1 1×r wavelength demultiplexers having their output ports respectively connected with the ports of N2 right nodes, where n1=N1/r; n1n2 r×r AWGs connecting the r×1 wavelength multiplexers and the 1×r wavelength demultiplexers r×rn1n2, and each of the r×r AWGs being associated with a wavelength subset {λk|k=0, 1, . . . , r−1}.

主权项

1. A method for constructing an interconnection network, comprising:
providing N1 N2×1 wavelength multiplexers, labeled by L0, L1, . . . , LN_−1, for N1 left nodes, an ith N2×1 wavelength multiplexer having its jth input port connected with a jth port of an ith left node, and a jth port of the ith left node is associated with a wavelengthλ[i+j]N1,wherein i=0, 1, . . . , N1−1, j=0, 1, . . . , N2−1;
providing N2 1×N1 wavelength demultiplexers labeled by R0, R1, . . . , RN2−1, for N2 right nodes, a jth 1×N1 wavelength demultiplexer having its ith output port connected separately with an ith port of a jth right node, and an ith port of a jth right node is associated with wavelengthλ[i+j]N1; interconnecting the N1 wavelength multiplexers on the left with the N2 wavelength demultiplexers on the right via the N1×N2 AWG, the N1×N2 AWG having the N1 input ports and the N2 output ports, and being associated with the wavelength set Λ={λ0, λ1, . . . , λN1−1}; decomposing the N1×N2 AWG to a three-stage AWG network SA(n1, r1, mA, n2, r2), wherein the AWG network SA comprises N1=r1n1 input ports on an input side, with each input port being a 1×n2 wavelength demultiplexer, and N2=r2n2 output ports on an output side, with each output port being an n1×1 wavelength multiplexer, mA r1×r2AWGs in the central stage, wherein r1=r2=r, n1=N1/r, n2=N2/r, and mA=n1n2; an ith input port is labeled by DA1(αA, aA), wherein αA=└i/n1┘ and aA=[i]n2, and a jth output port is labeled by MA1(βA, bA), wherein βA=└j/n2┘ and bA=[j]n2, and each of the AWGs in the central stage is labeled by GA1(αA, bA); the αAth input port of GA1(αA, bA) is connected with the bAth output port of DA1(αA, aA), the βAth output port of GA1(αA, bA) is connected with the αAth input port of MA1(βA, bA), and GA1(αA, bA) is associated with a wavelength subsetΛ[aA+bA]n1={λ[aA+bA]n1⁢r+k|k=0,1,…⁢,r-1}; replacing the ith N2×1 wavelength multiplexer Li and the 1×n2 wavelength demultiplexer DA1(αA, aA) with n2 r×1 wavelength multiplexers, each of the r×1 wavelength multiplexers is labeled by DA2(αA, aA, bA); replacing the jth 1×N1 wavelength demultiplexer Rj and the n1×1 wavelength multiplexer MA1(βA, bA) with n1 r×1 wavelength demultiplexers, each of the r×1 wavelength demultiplexers being labeled by MA2(βA, bA, αA); and associating each r1×r2 AWG, labeled by GA2(αA, bA), with a wavelength subset {λk|k=0, 1, . . . , r−1}; wherein the output port of DA2(αA, aA, bA) is connected with the αAth input port of GA2(αA,bA), and the input port of MA2(βA, bA, αA) is connected with the βAth output port of GA2(αA, bA).