| 摘要 |
PROBLEM TO BE SOLVED: To provide a new method and new apparatus for reducing DC/AC voltage variations in the level of the transistor of an IC chip. SOLUTION: The new apparatus has a plurality of pairs of power buses and ground buses. Each pair of power bus and ground bus has a power bus and a ground bus. Further, the new apparatus has a first power bus of the first pair of power bus and ground bus of the plurality of pairs of power buses and ground buses. The first power bus has a plurality of power bumps. Also, the new apparatus has a first ground bus of the first pair of power bus and ground bus of the plurality of pairs of power buses and ground buses. The first ground bus has a plurality of ground bumps. The respective power bumps are disposed substantially an equal distance apart from the arbitrary directly adjacent ground bumps to each other of the first ground bus. Also, the respective ground bumps are disposed substantially an equal distance apart from the arbitrary directly adjacent power bumps to each other of the first power bus. COPYRIGHT: (C)2005,JPO&NCIPI
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