发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device reduced in the generating rate of faulty disconnection in a conduction via due to stress migration, and to provide its manufacturing method. SOLUTION: The semiconductor device is provided with a multi-layer wiring structure which comprises a first wiring layer 13, a second interlayer insulating film 14 arranged on the first wiring layer 13, the conduction via 31 buried into a first via hole in the second interlayer insulating film 14 and whose lower end is contacted with the first wiring layer 13, a sacrifice via 32 buried into a second via hole in the second interlayer insulating film 14 and whose lower end is contacted with the first wiring layer 13 while the upper end thereof is in opened state electrically, and a second wiring layer 15 arranged at the vicinity of surface of the second interlayer insulating film 14 and connected to the upper end of the conduction via 31. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005142423(A) 申请公布日期 2005.06.02
申请号 JP20030378423 申请日期 2003.11.07
申请人 TOSHIBA CORP 发明人 FUJIMAKI TAKESHI
分类号 H01L21/3205;H01L21/4763;H01L21/768;H01L23/52;H01L23/522;(IPC1-7):H01L21/768;H01L21/320 主分类号 H01L21/3205
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