| 摘要 |
<p>A solid state current divider is disclosed wherein two transistors are arranged with the emitter of the input transistor connected to a source of current to be divided and the collector of the output transistor connected to the load device receiving the divided current. The bases of the two transistors are connected together and to a source of voltage for forward biasing the emitter-base junction of the first transistor. The collector of the first transistor is connected to the emitter of the second transistor. The first transistor is driven into saturation causing the emitter-base junction of the second transistor to forward bias. Under these circumstances the carriers collected by the collector of the first transistor are reinjected by the collector of the first transistor and by the emitter of the second transistor in proportion to the areas of the collector-base junction of the first transistor and the emitter-base junction of the second transistor.</p> |
