发明名称 LARGE SCALE INTEGRATED CIRCUIT
摘要 PURPOSE:Designing of conductor patterns for the purpose of intercircuit connection is facilitated by so disposing the input and output points of the rows along the mutually parallel opposing two edges of the wiring forbidden region of a large scale integrated circuit that these points are off the same lines perpendicular to the edges of the wiring forbidden region.
申请公布号 JPS5319775(A) 申请公布日期 1978.02.23
申请号 JP19760094003 申请日期 1976.08.09
申请人 HITACHI LTD 发明人 KAMIKAWAI RIYOUTAROU;HARADA YUTAKA
分类号 H01L21/82;H01L27/02 主分类号 H01L21/82
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